Wide-bandgap GaN-based power electronic devices are emerging as promising candidates for the next generation high-efficiency power converters owing to superior material properties such as high electric breakdown field, high electron saturation velocity, and high mobility in a readily available heterojunction 2-dimensional electron gas (2DEG) channel. After a decade of rapid progress in epitaxial growth, device design, processing technology, packaging technology, and gate driving techniques, GaN-on-Si lateral heterojunction power devices are being commercialized and used to implement power converters with impressive efficiency and compact size.
However, the highly desirable GaN devices for application with normally-off operation, large gate swing, low gate leakage, small dynamic degradation and high stability and reliability simultaneously, are still under development. In this work, we aimed at solving these challenges with demonstrating a high-quality gate dielectric LPCVD-SiNx
at first, then integrating an effective AlN/SiNx
passivation layer with the gate dielectric to suppress dynamic on-resistance degradation, and finally, realizing the high-performance normally-off GaN MIS-FET with the highly reliable gate dielectric and effective passivation.
The first part of this thesis work is focused on demonstrating the high-quality LPCVD (low pressure chemical vapor deposition)-SiNx
gate dielectric, which can suppress the gate leakage effectively and greatly enlarge the gate swing. The SiNx
deposited at 780 °C using LPCVD was employed as both gate dielectric and passivation for the GaN-based D-mode MIS-HEMT. The
exhibit desirable gate dielectric performance including small forward and reverse gate leakage and large breakdown electric field. Furthermore, we systematically investigated the gate leakage and breakdown mechanisms of the LPCVD-SiNx
thin film deposited on AlGaN/GaN heterostructures. The dominant mechanism of the leakage current through the LPCVD-SiNx
gate dielectric is identified to be Poole-Frenkel emission at low electric field and Fowler-Nordheim tunneling at high electric field. The LPCVD-SiNx
gate dielectric exhibits intrinsic high breakdown electric field. Both electric-field-accelerated and temperature-accelerated time-dependent dielectric breakdown (TDDB) tests were also conducted to predicate the lifetime of LPCVD-SiNx
Although the LPCVD-SiNx
gate dielectric delivers superior performance, as a passivation layer, it still needs further optimization. At the second part of the thesis work, we demonstrate an integrated process that illustrates the compatibility of an effective AlN/SiNx
passivation with high-performance (i.e. low leakage and high breakdown) LPCVD-SiNx
gate dielectric for GaN-based MIS-HEMT. It is shown that the AlN/SiNx
passivation structure maintains its superior capability of suppressing the current collapse after enduring high temperature of 780 °C during the LPCVD-SiNx
deposition. The AlN/SiNx
passivation is shown to be significantly better than the LPCVD-SiNx
passivation by delivering small dynamic RON
degradation, especially under high drain bias switching with VDS
> 100 V.
Toward realizing high-performance E-mode GaN power device with LPCVD-SiNx
gate dielectric and AlN/SiNx
passivation, in the third part of the thesis work, we developed an effective interface protection technique to protect the etched GaN surface during the high-temperature LPCVD process. With this protection technique, highly reliable LPCVD-SiNx
gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode GaN MIS-FETs with high stability and high reliability. The LPCVD-SiNx
/GaN MIS-FET delivers remarkable advantages in high Vth
thermal stability, large positive threshold voltage, low on-resistance and small dynamic on-resistance degradation.
In the last part of this thesis work, systemic characterizations were conducted on the E-mode MIS-FETs to investigate the VTH
stability and reliability. TDDB tests were used to reveal the gate dielectric lifetime, which is much higher than that of p-GaN power transistors. Combining the bias temperature instability (BTI) test and 1/f noise characterization, small recoverable threshold voltage shifts were observed and the possible origins were revealed. The stability under OFF-state with high drain bias was also evaluated using both step-stress tests and high temperature reverse bias (HTRB) stress.
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