THESIS
2017
xviii, 118 pages : illustrations ; 30 cm
Abstract
GaN-based high electron mobility transistors (HEMTs) are emerging as one of the most
promising candidates for high efficiency power switching applications owing to their
capability to deliver low on-resistance, high switching frequency, and high breakdown voltage.
However, some key technical challenges are still present in state-of-the-art GaN HEMTs,
preventing them from being widely adopted to the level the industry is expecting. One of the
challenges is the dynamic on-resistance issue, also known as current collapse. Another
challenge is the long-term reliability concern, for which the most significant liability is the
gate stack. Mitigating these two major challenges to advance the GaN HEMT technology for
wide utilization motivates the research work in this thesis.
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GaN-based high electron mobility transistors (HEMTs) are emerging as one of the most
promising candidates for high efficiency power switching applications owing to their
capability to deliver low on-resistance, high switching frequency, and high breakdown voltage.
However, some key technical challenges are still present in state-of-the-art GaN HEMTs,
preventing them from being widely adopted to the level the industry is expecting. One of the
challenges is the dynamic on-resistance issue, also known as current collapse. Another
challenge is the long-term reliability concern, for which the most significant liability is the
gate stack. Mitigating these two major challenges to advance the GaN HEMT technology for
wide utilization motivates the research work in this thesis.
This thesis is dedicated to the development of advanced gate stacks and passivation
techniques to achieve stable device operation with minimal threshold voltage (V
th) shift and
low current collapse in GaN HEMTs and metal-insulator-semiconductor HEMTs
(MISHEMTs). First, a surface engineering process combining a pre-gate surface treatment and
a post-gate thermal annealing was developed for Schottky gate HEMTs. High breakdown
voltage (V
BR) and low current collapse were achieved in the devices. Second, in situ SiN was
investigated systematically as the gate dielectric and surface passivation for GaN MISHEMTs.
Minimal V
th shift was realized under long gate stress and high temperature operation. Taking
the advantages of in situ SiN, high power MISHEMTs with a 20-mm gate width were
demonstrated using a passivation-first process and a bilayer SiN passivation scheme, realizing
low dynamic on-resistance and high V
BR. Third, atomic layer deposited high-k ZrO
2 was developed as the gate dielectric for GaN MISHEMTs to enhance the gate control. A high
on/off current ratio, a nearly ideal subthreshold slope, a high V
BR, and suppressed current
collapse were achieved simultaneously in the device. Power MISHEMTs with a 20 mm gate
width were also demonstrated using the ZrO
2 gate dielectric, exhibiting excellent switching
characteristics. Finally, a novel enhancement-mode GaN MISHEMT was demonstrated using
an ultrathin-barrier AlGaN/GaN heterostructure, selective area barrier regrowth, and a high-k
ZrO
2 gate dielectric. A uniform and large positive V
th was achieved as a result of the high
quality gate stack in the MISHEMTs.
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