The development of Si based optoelectronic circuits is fueled by the minimization of device dimension and the maximization of device performance. As the size of individual transistors approaches atomistic and quantum mechanical boundaries, excessive power dissipation and severe signal delay are becoming more and more pressing issues. III-V compounds with excellent electron transport properties could replace Si as the channel material and enable further scaling of the CMOS technology. Moreover, the light emitting attribute of III-V materials could well address the inter/intra-chip communication bottleneck encountered by present Si based microprocessors. Therefore, integrating III-V alloys with the advanced Si based CMOS processing technology is of key significance.

This thesis is thus...[ Read more ]

The development of Si based optoelectronic circuits is fueled by the minimization of device dimension and the maximization of device performance. As the size of individual transistors approaches atomistic and quantum mechanical boundaries, excessive power dissipation and severe signal delay are becoming more and more pressing issues. III-V compounds with excellent electron transport properties could replace Si as the channel material and enable further scaling of the CMOS technology. Moreover, the light emitting attribute of III-V materials could well address the inter/intra-chip communication bottleneck encountered by present Si based microprocessors. Therefore, integrating III-V alloys with the advanced Si based CMOS processing technology is of key significance.

This thesis is thus devoted to the growth of III-V nano-structures on CMOS compatible (001) Si substrates, and to the design of novel nano-scale optoelectronic devices integrated on Si. Firstly, GaAs/InGaAs nano-fins were selectively grown inside 65 nm-wide Si trenches, and the excellent crystalline quality is highlighted through fabricating fin-array tunnel diodes with room temperature negative differential regions. Then, with the demonstrated tunnel junctions as basic building components, various digital circuits including tunneling inverters, tunneling triggers and tri-state memory cells were monolithically integrated on (001) Si substrates.

Secondly, InP nano-ridges were selectively grown inside 450 nm-wide Si trenches by developing a unique three-step growth procedure. Stacked InGaAs quantum wires with strong two dimensional quantum confinement were embedded inside InP nano-ridge by examining the self-limiting growth mode. Using a novel “cycled growth procedure”, multi InGaAs ridge quantum wells with excellent optical property were successfully inserted inside InP nano-ridges. The potential of the InP/InGaAs nano-ridges as nano-scale light sources is evidenced by the demonstration of the first room temperature InP/InGaAs nano-laser array on SOI with adjustable emission wavelength at telecom bands.