Faithful recording of the biopotential signal is the prerequisite for the diagnosis and treatment of various diseases. Typical local field potentials of bio-signals such as ECG, EEG and ERG lie between 0.5 Hz and 500 Hz with amplitudes ranging from tens of μV to several mV. To pick-up the tiny biosignal, We need low-noise bio-interface circuitry. The thesis focuses mainly on the analysis of noise issues and designs for low-frequency biomedical applications.

First, the circuit-level noise reduction techniques in CMOS circuitry is investigated. Chopper stabilization and auto-zeroing are two popular techinuqes to mitigate low-frequency noises, but they both have issues. Chopping will generate ripple caused by the amplifier's input offset voltage and auto-zeroing will result in the...[ Read more ]

Faithful recording of the biopotential signal is the prerequisite for the diagnosis and treatment of various diseases. Typical local field potentials of bio-signals such as ECG, EEG and ERG lie between 0.5 Hz and 500 Hz with amplitudes ranging from tens of μV to several mV. To pick-up the tiny biosignal, We need low-noise bio-interface circuitry. The thesis focuses mainly on the analysis of noise issues and designs for low-frequency biomedical applications.

First, the circuit-level noise reduction techniques in CMOS circuitry is investigated. Chopper stabilization and auto-zeroing are two popular techinuqes to mitigate low-frequency noises, but they both have issues. Chopping will generate ripple caused by the amplifier's input offset voltage and auto-zeroing will result in the aliasing of the wideband noise. We proposed to use the method of harmonic transfer matrix to analyze circuitry circuits that employ chopping and auto-zeroing. Based on the analysis results, a ripple-free chopper amplifier prototype is proposed.

Second, a low-noise chopper capacitively-coupled instrumentation amplifier (CCIA) for recording bio-potential is designed. It features a digital-assisted DC electrode offset cancellation loop. It achieves a noise spectrum of 47nV/√Hz and is capable of handling ±50 mV electrode offset.

Third, a low-power fully integrated analog front-end for bio-potential sensors is proposed. The signal conditioning circuitry consists of an integrating sampler and a 12-bit SAR ADC. Measurement results show that the analog front end achieves an in-band gain of 58dB and an input-referred noise spectrum density of 46 nV/√Hz consuming 9.2 μW in total. The prototype IC is experimented with capturing ECG on human beings.

Last but not least, a low-power lower-jitter relaxation oscillator for on-chip low-frequency clock generation is presented. A dynamic common-gate comparator is proposed to reduce the power, and it is combined with a slope boosting technique to reduce the period jitter. The oscillator achieves 0.025% period jitter and 70 ppm/°C temperature coefficient while consuming 1.36 μW at 364 kHz with a 1.2 V supply.