Commercial GaN power HEMTs have been successfully demonstrated in many power applications such as the quick charger, the LED driver, and the power factor correction (PFC) circuits. They outperform their Si counterparts by delivering higher switching frequency, higher efficiency, and smaller systems volume. However, these advantageous characteristics are not yet fully unlocked due to the use of off-chip Si-based peripheral circuits. Currently, most commercial products have vulnerable gate structures and smaller driving margins. Oscillation induced by parasitic components added extra burdens to the design of device packages and printed circuit boards. To resolve the parasitic problems and realize robust GaN power converters, monolithic integration of different function blocks is an attrac...[ Read more ]

Commercial GaN power HEMTs have been successfully demonstrated in many power applications such as the quick charger, the LED driver, and the power factor correction (PFC) circuits. They outperform their Si counterparts by delivering higher switching frequency, higher efficiency, and smaller systems volume. However, these advantageous characteristics are not yet fully unlocked due to the use of off-chip Si-based peripheral circuits. Currently, most commercial products have vulnerable gate structures and smaller driving margins. Oscillation induced by parasitic components added extra burdens to the design of device packages and printed circuit boards. To resolve the parasitic problems and realize robust GaN power converters, monolithic integration of different function blocks is an attractive approach.

The concept of the all-GaN solution has been proposed for many years, but some challenges for the monolithic integration still require intensive research. Due to a lack of high-performance p-type transistors and immature matching characteristics, many topologies for peripheral circuits based on Si technology cannot be deployed directly on the GaN power integration platform. Unique structures and extra circuits have to be designed on GaN integrated platform. After that, dynamic properties of the GaN power HEMTs such as dynamic on-resistance and threshold voltage instability are also critical problems that should be deliberately incorporated during circuit design. Compared to the Si technology, the GaN power platform requires a more accurate and comprehensive device model to reduce the overall period of designing and troubleshooting.

In this work, we focused on the GaN-based integrated circuit development and the device modelling for circuit design and system engineering. The entire thesis could be divided into three parts:

(1) GaN-specific function blocks such as the integrated gate driver, overcurrent protection, and under-voltage lockout circuit are proposed on the commercially available integration platform for p-GaN gate power HEMTs. In order to clearly present the performance of such circuits, the integration platform is introduced with emphasis on both passive components and active components. The GaN-based logic circuit, such as the inverter and ringing oscillator, also indicates their operating capability at high-speed conditions. After that, the designed drivers, overcurrent protection, and the under-voltage lockout circuit are separately presented with their working principle and circuit-level validation.

(2) The dynamic threshold voltage (V_TH) of the Schottky-type p-GaN gate HEMT is investigated. In order to incorporate such a problem during circuit design, the charge storage mechanism is proposed and quantitively validated during this work. We present the fact that the dynamic V_TH shift is an intrinsic characteristic related to the semi-floating p-GaN layer which is sandwiched between the Schottky junction and the p-GaN/AlGaN/GaN heterojunction. Such a phenomenon could be predicted with the experienced terminal voltages.

(3) A SPICE-compatible equivalent circuit model is presented according to the structure of Schottky-type p-GaN gate HEMTs. It features a floating node to imitate the charge storage process within the gate stack. For the purpose of quantitatively describing the charge storage mechanism, elements in the gate stack were modelled according to the underlying physical mechanisms. Basic device behaviour and the dynamic characteristics were compared between the measured result and simulation to validate the proposed model and the corresponding parameter extraction methods. In addition, switching characteristics that are impacted by the dynamic V_TH were analyzed with both simulated and experimental results.