THESIS
2023
1 online resource (viii, 44 pages) : illustrations (some color)
Abstract
High-frequency trading is a highly competitive area, where extremely low latency of
every module in the trading system is pursued so that the traders can seize the market
opportunities at the first moment. FPGA (Field Programmable Gate Array) becomes the
best solution concerning low latency and reconfigurability. This work explores the FPGA
implementations of two modules in the system: the local order book reconstructing system
as part of the data handling module, and the hardware-accelerated predictive model for
the trading strategy module. These two modules usually act as the key components of
the system, and the improvement in their latency can bring great profit.
The local order book reconstructing system is proposed to obtain remarkable memory
usage and operating latency balance, w...[
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High-frequency trading is a highly competitive area, where extremely low latency of
every module in the trading system is pursued so that the traders can seize the market
opportunities at the first moment. FPGA (Field Programmable Gate Array) becomes the
best solution concerning low latency and reconfigurability. This work explores the FPGA
implementations of two modules in the system: the local order book reconstructing system
as part of the data handling module, and the hardware-accelerated predictive model for
the trading strategy module. These two modules usually act as the key components of
the system, and the improvement in their latency can bring great profit.
The local order book reconstructing system is proposed to obtain remarkable memory
usage and operating latency balance, which dramatically reduces the memory usage by
1.98 to 93.21 times while maintaining the latency at a low level. Different PS-PL interfaces
in the Xilinx UltraScale+ MPSoC are also explored in this application, which shows
similar performance among them.
The predictive model, which shows lower prediction error and execution time, is also
proposed to reveal the possibility of implementing a time-consuming neural network model
in HFT. This model is inspired by the interpretation of the market microstructure. The
input price signal is decomposed into the event signal and the system transfer function
representing the market impact of the event signal, which enable the creation of this
interpretable model. It is designed to learn the decomposing ability and the market
impact patterns at the first training, and fine-tune the predicting branch next. The model shows low prediction error and explainable behaviors, which make it more reliable
to traders. Then the specific hardware acceleration method is applied to the well-trained
model, which speeds up the execution time by up to 6.63 times and enables it for a
higher-frequency scenario.
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