Heterogeneous integration of III-V compound semiconductor with silicon is attracting renewed attention in recent years due to its potential in electronic and photonic applications. For electronic applications, a robust integration allows low-voltage and high-speed III-V based transistors to couple with mature silicon-based technologies for functional circuit blocks. Several successful demonstrations have been achieved by molecular beam epitaxy (MBE). In regard to photonic applications, silicon photonics is an important area of research with its possible replacement of copper interconnects. The well-developed III-V photonic devices can be utilized on a silicon platform if a seamless integration can be realized. This concept has been extensively demonstrated by wafer bonding, whereas the...[ Read more ]

Heterogeneous integration of III-V compound semiconductor with silicon is attracting renewed attention in recent years due to its potential in electronic and photonic applications. For electronic applications, a robust integration allows low-voltage and high-speed III-V based transistors to couple with mature silicon-based technologies for functional circuit blocks. Several successful demonstrations have been achieved by molecular beam epitaxy (MBE). In regard to photonic applications, silicon photonics is an important area of research with its possible replacement of copper interconnects. The well-developed III-V photonic devices can be utilized on a silicon platform if a seamless integration can be realized. This concept has been extensively demonstrated by wafer bonding, whereas the manufacturing complexity, reliability and yield are main challenges in this transfer technique. In this thesis, demonstration of heterogeneous integration of III-V based electron and photonic devices on silicon substrates is described, using Metal organic chemical vapor deposition (MOCVD), which is considered more compatible with CMOS processes with good potential for wafer level manufacturing.

In this work, InP thin films with smooth surface morphology were firstly achieved by introducing thin GaAs buffer layers. The GaAs buffer was optimized based on the surface morphology, crystalline quality and in situ RAS signal. The total thickness of the buffer layer was finally reduced to 1.2μm by trimming the GaAs buffers as a thin buffer is more desirable for process integration. On top of the thin InP buffer layers, high performance metamorphic high electron mobility transistors (mHEMTs) have been demonstrated for the first time.

To implement photonic devices on the buffers, the epitaxial films quality was further improved utilizing novel post-treatment techniques, including thermal process and strained layers for defects reduction. InGaAs p-i-n photodetectors lattice-matched to InP grown on top of the improved buffers demonstrated comparable responsivity and intrinsic capacitance with the same devices grown on InP and GaAs substrates, which is promising as a component in silicon photonics.