Investigation and experimental verification of the feasibility and constraints of high frequency (HF, 3MHz–30MHz) hysteretic buck converters are presented. Both voltage-mode control and current-mode control are studied, compared and verified with measurement results....[ Read more ]

Investigation and experimental verification of the feasibility and constraints of high frequency (HF, 3MHz–30MHz) hysteretic buck converters are presented. Both voltage-mode control and current-mode control are studied, compared and verified with measurement results.

First, the conventional hysteretic voltage-mode control, or bang-bang control, is analyzed, and it is found that the output voltage ripple is very large compared to the hysteresis window. By reducing the hysteresis window to zero, the single boundary control (SBC) is shown to be a feasible operating mode for voltage-mode control with finite circuit delay. SBC also helps in reducing the system delay by eliminating delay associated with the hysteresis window. As a result, the converter can switch in the HF range.

Second, a hysteretic buck converter with the same specifications is designed to implement current-mode control using a passive integrator at the switching node. The output waveform of the integrator with relatively high bandwidth emulated the inductor current ripple, and as such a power-consuming integrated high-speed current sensor is not needed. The SBC current-mode converter achieves a higher switching frequency than the SBC voltage-mode converter as the phase delay between the ramp signal and the inductor current is corrected. In addition, an error correction path (ECP) is introduced that re-defines the reference voltage through a high gain error amplifier. The ECP mitigates the DC offset problem associated with hysteretic buck converters.

The proposed designs were fabricated using 0.35μm CMOS process. The SBC voltage-mode and SBC current-mode converters are capable of operating at 10MHz and 15MHz, respectively, leading to the use of small inductors (100nH) and small output capacitors (440nF). The error correction path leads to tight line regulation (6.9mV/V) and load regulation (10.9mV/A) for both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) operations.