For system on a chip (SoC), a large value inductor (μH) needs to be integrated within a sub-mm² area for the design of an efficient wireless power transfer interface. Integration of such a large value inductor is challenging and is beyond the scope of conventional integration techniques. This work outlines two CMOS compatible on-chip inductor integration approaches which can accommodate large value inductors without affecting the area of active circuitry. The first methodology implements the on-chip power receiving coil using silicon embedded inductor technology, in which inductors are fabricated in the thick bottom layer of the substrate. The second methodology integrates the inductor above the passivation layer of the CMOS chip. In both of these methodologies, no active circui...[ Read more ]

For system on a chip (SoC), a large value inductor (μH) needs to be integrated within a sub-mm² area for the design of an efficient wireless power transfer interface. Integration of such a large value inductor is challenging and is beyond the scope of conventional integration techniques. This work outlines two CMOS compatible on-chip inductor integration approaches which can accommodate large value inductors without affecting the area of active circuitry. The first methodology implements the on-chip power receiving coil using silicon embedded inductor technology, in which inductors are fabricated in the thick bottom layer of the substrate. The second methodology integrates the inductor above the passivation layer of the CMOS chip. In both of these methodologies, no active circuitry is affected by the integration and effectively no extra area needs to be allocated for the inductor. Measurement results show that the fabricated inductors using these integration approaches can render a large quality factor (more than 20) with an inductance density of 200 nH/mm².

Alongside the integration techniques, a model of the wireless power link is required to design an efficient link which can transmit the maximum amount of power within the constraints of the application. This work presents a model of an inductive type near-field wireless power transfer interface to estimate its power efficiency and voltage gain. The proposed model does the prediction using the geometric variables of the system. Wireless power links were implemented, and the accuracy of the proposed model was confirmed by comparing the measured and calculated results. This model can also suggest the optimal operating frequency and load of an inductive link for maximal power transfer. In the end, utilizing the model and the integration techniques, efficient wireless power links, which can supply a mW range of power to sub-mm² bio-microsystems, were designed, with efficiency of more than 5% at an implantation depth of 10mm.