THESIS
2013
iv leaves, v-xiii, 116 pages : illustrations ; 30 cm
Abstract
The energy-efficient multiprocessor system is a natural platform for high-performance computing
and embedded systems. Silicon photonics-based optical networks-on-chip (ONoCs) are
emerging on-chip communication architectures that can potentially offer high bandwidth and
energy efficiency. In this dissertation, we propose a torus-based hybrid optical-electronic NoC and a 3D mesh-based ONoC for multiprocessor systems, and show their performance and energy
efficiency under real applications and uniform traffic. New low-cost 4x4, 5x5, 6x6 and
7x7 on-chip optical routers are proposed to reduce cost and optical power loss. In addition, new
techniques of adaptive power control mechanism, floorplan optimization, and low-latency control
protocols are used to further enhance the energy effi...[
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The energy-efficient multiprocessor system is a natural platform for high-performance computing
and embedded systems. Silicon photonics-based optical networks-on-chip (ONoCs) are
emerging on-chip communication architectures that can potentially offer high bandwidth and
energy efficiency. In this dissertation, we propose a torus-based hybrid optical-electronic NoC and a 3D mesh-based ONoC for multiprocessor systems, and show their performance and energy
efficiency under real applications and uniform traffic. New low-cost 4x4, 5x5, 6x6 and
7x7 on-chip optical routers are proposed to reduce cost and optical power loss. In addition, new
techniques of adaptive power control mechanism, floorplan optimization, and low-latency control
protocols are used to further enhance the energy efficiency and performance. The second
part of this dissertation focuses on the system-level thermal modeling and analysis for ONoCs.
Thermal sensitivity of photonic devices is one of major concerns in relation to the optical onchip
interconnection, which will result in additional optical power loss under on-chip temperature
variations. System-level ONoC thermal models are required to fully understand these
challenges and help further develop the optical on-chip interconnection technology. We systematically
model the thermal effects in WDM-based ONoCs as well as in single-wavelength
ONoCs, and find the optimal device settings to minimize the impacts of thermal effects in
ONoCs. Based on the thermal models, we reveal important factors regarding ONoC energy
efficiency under temperature variations, including the initial setting of photonic devices, the number of switching stages in the ONoC architecture, and the bandwidth of the optical switching
elements. We develop OTemp, an optical thermal effect modeling platform for both WDM-based
and single-wavelength optical links in ONoCs. OTemp can be used to analyze the optical
power loss and power consumption for optical links under temperature variations. Finally, we
use case studies to quantitatively analyze the thermal-aware power consumption of ONoCs with
different combinations of low-temperature-dependence techniques.
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