Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) are emerging as promising contenders to replace existing Silicon and Gallium Arsenide (GaAs) devices in the radio-frequency/microwave power amplifiers .and high-power switching applications. Along with the fast development of device technology and circuit integration, reliable predictive models for GaN HEMTs are of great value for circuit design and simulation. This thesis is focused on developing an engineering model to fulfill the gap between the device technology and circuit designs for GaN HEMTs.

In this thesis, a physics-based compact model for the drain currents and capacitances of GaN HEMTs is developed. First, a surface-potential-based compact model for the drain current is developed. Consistently, t...[ Read more ]

Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) are emerging as promising contenders to replace existing Silicon and Gallium Arsenide (GaAs) devices in the radio-frequency/microwave power amplifiers .and high-power switching applications. Along with the fast development of device technology and circuit integration, reliable predictive models for GaN HEMTs are of great value for circuit design and simulation. This thesis is focused on developing an engineering model to fulfill the gap between the device technology and circuit designs for GaN HEMTs.

In this thesis, a physics-based compact model for the drain currents and capacitances of GaN HEMTs is developed. First, a surface-potential-based compact model for the drain current is developed. Consistently, the charge and capacitance model is formulated to predict the terminal capacitances and trans-capacitances for transient simulations. Also, the parasitic capacitances are modeled with conformal mapping method and unified parameters. Then, the model is calibrated and validated with TCAD simulations, and the experimental DC I-V and S-parameter measurements of fabricated devices. Finally, the model e-HEMT is implemented in i-MOS platform with couples of techniques to improve convergence to support the engineering applications. Afterwards, the benchmarking tests and the typical circuit simulations are demonstrated in i-MOS platform.