THESIS
2014
xvi, 108 pages : illustrations ; 30 cm
Abstract
Fully-integrated DC-DC converter, which is able to provide a DC-to-DC voltage
conversion without using any bulky off-chip inductors and capacitors, is one of the most
popular emerging topics in both industry and academia due to the integration trend, which
results in lower component cost, smaller PCB foot-print and simpler end product design
complexity. However, there are performance trade-offs accompany with the full-integration
implementations. The efficiency is greatly reduced compared to a traditional one with off-chip
LC components due to the higher switching and conduction loss, and the delay related reverse
current loss at light-load. Also the integrated inductors and capacitors are still costly. So this
thesis provides some solutions and optimizations to improve the perf...[
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Fully-integrated DC-DC converter, which is able to provide a DC-to-DC voltage
conversion without using any bulky off-chip inductors and capacitors, is one of the most
popular emerging topics in both industry and academia due to the integration trend, which
results in lower component cost, smaller PCB foot-print and simpler end product design
complexity. However, there are performance trade-offs accompany with the full-integration
implementations. The efficiency is greatly reduced compared to a traditional one with off-chip
LC components due to the higher switching and conduction loss, and the delay related reverse
current loss at light-load. Also the integrated inductors and capacitors are still costly. So this
thesis provides some solutions and optimizations to improve the performance of fully-integrated
switching power converters, while at the same time reduce the overall cost.
In the first design, standard package bondwire that exists in general bondwire-based
packages and known as parasitic inductance is used as the power inductor, which is almost
free of charge while better in performance compared to the widely used on-chip spiral metal
inductors. The inductance precision requirement is relieved and the light-load efficiency is
significantly increased by the proposed DCM control technique, which used to be an issue for
fully-integrated high-frequency converters due to the circuitry delays. A lot of performance
tweaks are also applied in the design. As a result, with the three major power losses reduced or eliminated, the efficiency, especially at light-load, is significantly increased.
In the second design, four-phase operation with ripple cancellation is introduced to
further reduce the cost in terms of chip-area for fully-integrated switching power converters,
while at the same time increase the maximum output power. The extra cost with the increase
of the numbers of inductors is well compensated by the standard package bondwire inductors.
A new topology with a flying capacitor is implemented for extra chip-area reduction. So an
overall up to 10X chip-area reduction is achieved without using advance technology. As a
result, a 0.96 A/mm
2 current density is achieved without using advanced technology or
off-chip inductors
In the rest of this thesis, some optimizations for fully-integrated switching power
converters are done to achieve a better performance, including a delay-free
voltage-to-duty-cycle controller for circuitry design simplicity, a high-side NMOS topology
for better efficiency and a shunt-regulation for better transient performance.
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