Emerging applications like internet-of-things (IoT) and wireless sensor network (WSN) are the new driving forces behind the Complementary Metal-Oxide Semiconductor (CMOS) temperature sensor market. In these applications, low cost sensor with small form factor, low power and minimal calibration effort are the main requirements for high-volume deployment; yet existing temperature sensor solutions heavily rely on overhead circuits and/or calibration to achieve the target requirements, leading to high cost.

In this thesis, new circuit design techniques are proposed in order to achieve low power and calibration-relaxed temperature sensor, including the sensor front-end and the readout circuits.

The first part of the thesis focuses on the band-gap temperature sensor front-end design....[ Read more ]

Emerging applications like internet-of-things (IoT) and wireless sensor network (WSN) are the new driving forces behind the Complementary Metal-Oxide Semiconductor (CMOS) temperature sensor market. In these applications, low cost sensor with small form factor, low power and minimal calibration effort are the main requirements for high-volume deployment; yet existing temperature sensor solutions heavily rely on overhead circuits and/or calibration to achieve the target requirements, leading to high cost.

In this thesis, new circuit design techniques are proposed in order to achieve low power and calibration-relaxed temperature sensor, including the sensor front-end and the readout circuits.

The first part of the thesis focuses on the band-gap temperature sensor front-end design. First, a curvature-corrected batch-calibrated voltage reference (BGR) exploiting silicon bandgap narrowing effect (BGN) is presented. Without using overhead circuits, the BGR power is greatly reduced while the reference precision is maintained. Second, to further reduce the calibration effort, a trimless BGR with BJT base minority carrier trapping is proposed. Experimental results from fabricated MPW prototypes illustrate an untrimmed temperature coefficient (TC) of 33.6 ppm/℃ and +/-1.17% (3σ) output spread, which corresponds to +/-1.2 ℃ front-end induced error for a 100 ℃ sensing range.

The next section of this thesis seeks to design a low power and energy efficient incremental ΔΣ A/D converter for sensor readout. An input segmentation architecture by using the output from the decimation filter is presented, which relaxes the settling requirements of the modulator thereby reducing the converter power. Consisting only of oversampling ΔΣ modulator, it mitigates the calibration, noise folding and gain mismatch issues in conventional two-step incremental data converters. Experimental results illustrate a power consumption of only 2.2 μW at a conversion rate of 85 S/s and featuring 15.3b resolution with 158 dB FoM.

For the sensor system, a co-designed low-power passive RFID embedded temperature sensor is first demonstrated. The temperature sensor can operate under noisy supply circumstances and exhibit high process spreads immunity to capacitor, resistor and clock frequency spreads. The embedded sensor measures a sensing accuracy of +/-1.5 ℃ (3σ) from -30 ℃ to +60 ℃ with 0.95 μW power consumption (including the front-end and the readout). In addition, a stand-alone temperature sensor with a fast on-chip ramp calibration is designed for a reduced calibration time and moderate sensing precision. All the chip prototypes are fabricated in 0.18 μm standard CMOS process, validated and experimentally tested (the ramp-sensor is under characterization) illustrating the prospect of ultra-low power wireless temperature sensor for RFID and IoT applications.