Fully integrated 60GHz SoC studies have gained great breakthrough over the past decade. CMOS compatible design of passive components like balun and antenna are still challenging. Small form factor and low loss are critical requirements for a satisfactory design.

In this thesis, firstly, a compact 4:1 ratio transformer-based balun design in 65-nm CMOS process is presented. The insertion loss is lower than 1.5 dB from 56 GHz to 64 GHz. The balun also serves as a matching network between the output of mixer and chip output terminal. By choosing appropriate inductance ratio and mutual coupling coefficient, the impedance transforms from (52.9+j85.8) Ω to (29.1+j4.7) Ω. Cascade ABCD parameter de-embedding technique is applied to remove the connection parasitic effects in the testing structu...[ Read more ]

Fully integrated 60GHz SoC studies have gained great breakthrough over the past decade. CMOS compatible design of passive components like balun and antenna are still challenging. Small form factor and low loss are critical requirements for a satisfactory design.

In this thesis, firstly, a compact 4:1 ratio transformer-based balun design in 65-nm CMOS process is presented. The insertion loss is lower than 1.5 dB from 56 GHz to 64 GHz. The balun also serves as a matching network between the output of mixer and chip output terminal. By choosing appropriate inductance ratio and mutual coupling coefficient, the impedance transforms from (52.9+j85.8) Ω to (29.1+j4.7) Ω. Cascade ABCD parameter de-embedding technique is applied to remove the connection parasitic effects in the testing structure.

The second part of this thesis presents a compact on-chip MIMO antenna design for mmWave communications. The proposed structure consists of one folded monopole antenna operating as main antenna and one inverted-F antenna (IFA) serving as the auxiliary antenna. The proposed antenna is fabricated with CMOS compatible process. Antenna performance with different metal patterns representing the inner circuitry and RF grounds is analyzed and it is demonstrated that by adjusting the RF ground, a metamaterial effect of low S₂₁ isolation at a desired frequency can be achieved. Two interconnection techniques for chip and chip carrier connection are taken into consideration, including wire bonding and flip-chip. The antenna performance with bonding wire has measured peak broadside gains of the main antenna and auxiliary antenna of -4.0dB and -3.5dB respectively at 60GHz.