Wireless communication has become almost as ubiquitous as electricity. Mobile communication devices and smart phones are always at hand and reliably work for users. High-speed data rates and low-cost portable devices are two fast growing consumer demands. To achieve high data rates, spectrally-efficient complex modulation schemes, like 64QAM, are employed in modern wireless communication systems such as Long-Term Evolution (LTE). Low cost can be achieved by integrating more and more functionalities onto a single chip in CMOS technology, including digital baseband and signal processors and many essential building blocks for wireless transceivers, such as low-noise amplifier (LNA), mixers, frequency synthesizers, and digital-to-analog converter.

From the power amplifier (PA) desi...[ Read more ]

Wireless communication has become almost as ubiquitous as electricity. Mobile communication devices and smart phones are always at hand and reliably work for users. High-speed data rates and low-cost portable devices are two fast growing consumer demands. To achieve high data rates, spectrally-efficient complex modulation schemes, like 64QAM, are employed in modern wireless communication systems such as Long-Term Evolution (LTE). Low cost can be achieved by integrating more and more functionalities onto a single chip in CMOS technology, including digital baseband and signal processors and many essential building blocks for wireless transceivers, such as low-noise amplifier (LNA), mixers, frequency synthesizers, and digital-to-analog converter.

From the power amplifier (PA) designer’s perspective, however, modern modulated signals are not friendly, because their high peak-to-average power ratio (PAPR) leads to lower PA efficiency. And CMOS technology is not a good choice for PA implementation due to its low breakdown voltage and lossy substrate.

In this thesis, an efficient CMOS envelope-shaping-and-tracking (EST) power amplifier system for LTE applications is presented. The whole system consists of a high-performance CMOS supply modulator (SM) and a fully-integrated high-power CMOS hybrid class-E PA. The proposed system architecture reduces the burden of the SM in conventional EER architectures, eliminates the phase signal generation circuits, and makes full use of the switching PA’s linear region to reduce signal distortion at low output power level. The whole system achieves 35.7% efficiency, and -32.1dBc E-ACLR at an average output power of 23.9dBm under 2.4V system supply voltage for a 20MHz BW 16-QAM LTE signal without using any digital pre-distortion.