The objective of the thesis is to study the current variation of the organic thin film transistor, to discuss current approaches towards aligning grains and to provide several morphological solutions instead of changing the fabrication process.

At first, through the modeling of the fringe current, we predicted that the effect of irregularities near the corner of an organic semiconducting layer can be suppressed by keeping extension on the either sides of the electrodes.

Another major source of variation is the unpredictable grain orientation. Circular, waffle, and planar-symmetric organic transistor structures have been proposed and investigated by us and found to exhibit a reduced variation compared to the conventional transistors. Among proposed structures; circular structure...[ Read more ]

The objective of the thesis is to study the current variation of the organic thin film transistor, to discuss current approaches towards aligning grains and to provide several morphological solutions instead of changing the fabrication process.

At first, through the modeling of the fringe current, we predicted that the effect of irregularities near the corner of an organic semiconducting layer can be suppressed by keeping extension on the either sides of the electrodes.

Another major source of variation is the unpredictable grain orientation. Circular, waffle, and planar-symmetric organic transistor structures have been proposed and investigated by us and found to exhibit a reduced variation compared to the conventional transistors. Among proposed structures; circular structures have the lowest theoretical variation. The waffle structure is area-efficient but the most area-efficient one is not corresponding to the lowest angle-dependent variation. Furthermore, the waffle and circular electrodes need a routing interconnect layer. Our proposed planar-symmetric structures have single-layer-contact, have equal-width towards X and Y-axis, requires no extra step to fabricate, and corresponds to a higher fabrication yield. However, the planar-symmetric can reduce grain-orientation dependent variation up to a certain level with a slightly lower area-efficiency compared to the waffle structure. Circuit designers may choose the structure based on the required application and the available fabrication facility.