THESIS
1997
xiv, 120 leaves : ill. ; 30 cm
Abstract
A switched-current analog-FIR-filter architecture with fully-programmable digital coefficients is presented. Class-AB current-copier cells are used to track and hold the input signal. The held signals are passed through inherently linear current-division ladders at each tap of the filter. The ladders are controlled by 9-bit digital coefficients. A 16-tap prototype filter based on this architecture was designed for the target application of an adaptive equalizer for a 64-QAM communication channel, requiring 7bits of clynamicrange at 20-MS/s. The prototype filter with coefficients programmed for a lonpass configuration achieves a THD of -46dB for an input at 1-MHz and a sample-rate of 20-MS/s. Third-order intermodulation distortion (IMD) for two tones at l.0MHz and 1.5MHz is -42dBc. The p...[
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A switched-current analog-FIR-filter architecture with fully-programmable digital coefficients is presented. Class-AB current-copier cells are used to track and hold the input signal. The held signals are passed through inherently linear current-division ladders at each tap of the filter. The ladders are controlled by 9-bit digital coefficients. A 16-tap prototype filter based on this architecture was designed for the target application of an adaptive equalizer for a 64-QAM communication channel, requiring 7bits of clynamicrange at 20-MS/s. The prototype filter with coefficients programmed for a lonpass configuration achieves a THD of -46dB for an input at 1-MHz and a sample-rate of 20-MS/s. Third-order intermodulation distortion (IMD) for two tones at l.0MHz and 1.5MHz is -42dBc. The prototype was fabricated in a O.8μm CMOS process. The die core occupies 2408μm x 1762μm and the chip dissipates 70mW from a single 5V supply.
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