System-On-Chip design which utilizes multiple processor cores and hardware accelerator becomes more popular for the implementation of complex system. To reduce the power consumption of these systems, good task scheduling and voltage reduction technique has to be used. In this thesis we present a variable voltage scheduling scheme for systems with multiple processor cores subject to hard real-time constraints. The problem can be formulated as a mixed integer non-linear programming problem which is very hard to solve. We divide the problem into two steps. The first is to obtain a good initial valid schedule, and the second is to assign voltage in different time slots of the valid schedule. The voltage assignment problem is solved by formulating it as a non-linear programming problem. Two...[ Read more ]

System-On-Chip design which utilizes multiple processor cores and hardware accelerator becomes more popular for the implementation of complex system. To reduce the power consumption of these systems, good task scheduling and voltage reduction technique has to be used. In this thesis we present a variable voltage scheduling scheme for systems with multiple processor cores subject to hard real-time constraints. The problem can be formulated as a mixed integer non-linear programming problem which is very hard to solve. We divide the problem into two steps. The first is to obtain a good initial valid schedule, and the second is to assign voltage in different time slots of the valid schedule. The voltage assignment problem is solved by formulating it as a non-linear programming problem. Two efficient heuristics were developed to iteratively refine the initial schedule to further reduce the energy consumption. Experimental results show that the energy consumption is on average only 20% higher than a lower bound which is obtained by assuming the system has unlimited number of power supply voltages. Besides, the effect of finite tracking time of voltage switching is discussed. It is shown that different voltage switching sequences will result in different power consumption and an efficient algorithm has also been proposed to minimize the effect.