In this research, 4X and 6X charge pumps that are more area-efficient than conventional designs are proposed. Area-efficient technique in making use of the switching outputs of the basic cross-coupled doubler for driving high voltage clock phases and eliminating level shifters is discussed. For the 4X charge pumps, our best design saves up to 4 power transistors and 1 capacitor. To reduce the ripple voltage and to regulate the output voltage of the charge pump, a low dropout regulator is added in cascade. To enhance the bandwidth and reduce the size of compensation capacitors, compensation using dual-loop feedback is studied in detail, and modification is suggested to further reduce or eliminate the compensation capacitors....[ Read more ]

In this research, 4X and 6X charge pumps that are more area-efficient than conventional designs are proposed. Area-efficient technique in making use of the switching outputs of the basic cross-coupled doubler for driving high voltage clock phases and eliminating level shifters is discussed. For the 4X charge pumps, our best design saves up to 4 power transistors and 1 capacitor. To reduce the ripple voltage and to regulate the output voltage of the charge pump, a low dropout regulator is added in cascade. To enhance the bandwidth and reduce the size of compensation capacitors, compensation using dual-loop feedback is studied in detail, and modification is suggested to further reduce or eliminate the compensation capacitors.

The proposed 4X and 6X charge pumps with integrated low dropout regulators were fabricated using a 0.8μm AMS high voltage CMOS process. Both charge pumps deliver an output current of 100μA, and can work with an input voltage of as low as 2.2V. Low dropout regulators employing dual-loop feedback compensation methods which delivering an output current of l00mA were fabricated in a 0.6 μm AMS CMOS process for comparison.