THESIS
2003
xvii, 179 leaves : ill. ; 30 cm
Abstract
Power consumption has become the most important criteria in the design of wireless portable devices. In our work, we investigated the interaction between the wireless application domain knowledge and the general low power design technique for the optimal low power system design. In particular we looked at the following areas: Low power turbo-code codec design, Low power OFDM receiver design and a battery-life-driven power control method for low power wireless system design....[
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Power consumption has become the most important criteria in the design of wireless portable devices. In our work, we investigated the interaction between the wireless application domain knowledge and the general low power design technique for the optimal low power system design. In particular we looked at the following areas: Low power turbo-code codec design, Low power OFDM receiver design and a battery-life-driven power control method for low power wireless system design.
For Turbo-code, there are two classes of sub-optimal algorithms that are feasible for application, i.e., Soft-Output Viterbi algorithm (SOVA) and Maximum A-Posteriori (MAP) algorithm. We propose a low power VLSI architecture of SOVA based Turbo-code decoder using scarce state transition scheme (SST).
We also propose a low power VLSI architecture for turbo-code decoder based on an adaptive reduced complexity Log-Map algorithm (ARLog-Map). The computation of the state metric and the log-likelihood ratio are simplified or reduced adaptively without any impact on the decoding performance. Significant power reduction can be achieved in this way. A test chip based on this architecture for K=3, turbo-code decoding was designed and fabricated using the TSMC 0.35um process. It includes one forward state metric processor and two backward state metric processors.
Another area that we worked in regard to low power design was the data representation area. We investigated the feasibility of using the log number system (LNS) instead of linear binary number system to reduce the complexity of the operation, particularly those that need a large number of multiplications. We studied the example of the OFDM receiver and in this thesis, proposed a low complexity orthogonal frequency-division multiplexing (OFDM) receiver using Log-FFT for the coded OFDM system.
As coherent QAM modulation is used in the new standards which use OFDM modulation, channel estimation is needed. Its complexity is of crucial importance. By exploiting the time correlation character of channel impulse response, we suggest a low power design method for channel estimation using differential and threshold schemes.
We studied the power control methods for different optimization objectives given the knowledge of battery power capacity. We targeted the single cell multi-rate code division multiple access (CDMA) system with perfect successive interference cancellation (SIC) as our specific system. Different orderings for the SIC lead to different power control mechanisms. In particular, we propose some simple ordering schemes for SIC so that we can maximize the minimum transmission/connection time for a group of users within the same cell. We also propose schemes which can increase the total amount of data that a group of users can transmit within the same cell before they all run out of battery power.
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