With the rapid development of system-on-chip (SoC) designs, there is a growing trend towards the integration of IC systems and power-management circuits. Local, on-chip and capacitor-free low-dropout (LDO) regulators are important for future SoC applications. The capacitor-free feature significantly reduces system costs and board space, and also simplifies system design since external off-chip capacitor is not required. Currently, state-of-the-art capacitor-free LDO regulators need a minimum load current to stabilize voltage regulators in normal operation, typically around 10mA. However, this minimum load current requirement is a major obstacle to applying capacitor-free LDO regulators in some applications.

In this thesis, a novel capacitor-free LDO regulator with on-chip capacitor red...[ Read more ]

With the rapid development of system-on-chip (SoC) designs, there is a growing trend towards the integration of IC systems and power-management circuits. Local, on-chip and capacitor-free low-dropout (LDO) regulators are important for future SoC applications. The capacitor-free feature significantly reduces system costs and board space, and also simplifies system design since external off-chip capacitor is not required. Currently, state-of-the-art capacitor-free LDO regulators need a minimum load current to stabilize voltage regulators in normal operation, typically around 10mA. However, this minimum load current requirement is a major obstacle to applying capacitor-free LDO regulators in some applications.

In this thesis, a novel capacitor-free LDO regulator with on-chip capacitor reduction technique is proposed. With the proposed technique, the minimum load-current requirement of the proposed LDO regulator is significantly reduced to 100μA. At the same time, both loop bandwidth and loop stability are improved. Moreover, the required on-chip capacitors are small and are in total less than 6pF, which can be easily integrated by poly-poly or metal-metal capacitors in any CMOS technologies.

The proposed capacitor-free LDO regulator has been designed and fabricated using AMS 0.35μm CMOS technology. It occupies an active chip area of 236μm x 529μm. The supply voltage is from 1.2V to 3.3V while the output voltage is 1V. Load current ranges from 100μA to 150mA. Measurement results show good line and load regulations of 0.34mV/V at l00mA and -338.04μV/mA at 1.2V, respectively, due to the high low-frequency loop gain of the proposed structure.