The modern wireless communication industry has created great demands for better transceiver circuits. Fabricating analog and digital sub-circuits together on a single chip is an ideal solution to reduce circuit broad size and fabrication costs. However, CMOS digital circuits usually make use of low-resistivity Silicon substrates (1 -10 Ωcm). Passive elements, such as inductors and transmission lines, fabricated on these substrates would have high loss. This poses a limitation on the system performance. In this thesis, we focus on developing high performance on-chip inductors on these lossy substrates. These high performance inductors have either high quality factor or high resonance frequency....[ Read more ]

The modern wireless communication industry has created great demands for better transceiver circuits. Fabricating analog and digital sub-circuits together on a single chip is an ideal solution to reduce circuit broad size and fabrication costs. However, CMOS digital circuits usually make use of low-resistivity Silicon substrates (1 -10 Ωcm). Passive elements, such as inductors and transmission lines, fabricated on these substrates would have high loss. This poses a limitation on the system performance. In this thesis, we focus on developing high performance on-chip inductors on these lossy substrates. These high performance inductors have either high quality factor or high resonance frequency.

Micromachined suspended inductors have proven to show superior electrical performance but their mechanical integrity is also questionable. A novel Edge-Suspended Inductor (ESI) is proposed. Electromagnetic simulations have shown that E-field is actually stronger near the edges of a metal stripe when the frequency is high. This implies that the substrate near the edge is "more lossy". In our new design, the "more lossy" part of the substrate is selectively etched away to form an "undercut" structure. The substrate near the center is kept to provide a strong support. Prototypes were fabricated in MFF Phase II and the whole process was CMOS-compatible. A 4-nH inductor with peak-Q equals to 11 at 2.6 GHz is realized on a 15-20 Ωcm substrate.

Different parameters extracted from measurement are carefully studied. These extracted parameters include the Q-factor, input inductance, input resistance, series inductance and series resistance. New equivalent circuit models are also proposed to capture all the above-mentioned parameter's variations against frequency. In general, a good fitting can be obtained below the self-resonant frequency.