Clock recovery is a vital function in optical communication networks. As the data rate continues to increase in order to cope with the bandwidth demand posed by various applications enabled by the internet, conventional electronic clock recovery schemes requires high-speed IC frontend and is increasingly challenging. Various optoelectronic schemes have been proposed to tackle such speed bottleneck but most of which are suitable only for return-to-zero (RZ) transmission format. Clock recovery for non-return-to-zero (NRZ) transmission, which is currently the dominant format, is intrinsically difficult due to the lack of clock tone in the frequency domain....[ Read more ]

Clock recovery is a vital function in optical communication networks. As the data rate continues to increase in order to cope with the bandwidth demand posed by various applications enabled by the internet, conventional electronic clock recovery schemes requires high-speed IC frontend and is increasingly challenging. Various optoelectronic schemes have been proposed to tackle such speed bottleneck but most of which are suitable only for return-to-zero (RZ) transmission format. Clock recovery for non-return-to-zero (NRZ) transmission, which is currently the dominant format, is intrinsically difficult due to the lack of clock tone in the frequency domain.

In this thesis, we propose and demonstrate a novel clock recovery scheme for high-speed optical NRZ signals based on electroabsorption modulator in conjunction with a transition edge detector (TED). The TED is fabricated on SOI substrate and adopts an asymmetric Mach-Zehnder interferometer (AMZI) structure to enhance the clock tone for NRZ signals. The enhanced clock signals are further sampled by the EA-PLL for clock recovery. The clock recovery circuit is implemented with balanced photodetector for suppression of relative intensity noise (RIN) accumulated along the amplifier chain, which subsequently translate into reduced timing jitter in recovered clock signals.

Experimentally, timing jitter to ~650 fs for clock recovery of NRZ data at 2.5 Gb/s has been achieved. The clock recovery operation also exhibits a phase stability of < +50 fs in the range of 18 dB optical power and wavelength variation of 14 pm. The bit error rate performance for the receiver at 2.5 Gb/s incorporated with our clock recovery circuit shows the power penalty of our scheme is as low as 0.2 dB.