As the shape of the nanowire can significantly influence the characteristics of the resulting nanowire transistors, the cross-section of stacked silicon nanowires formed by the Bosch process and stress-limited oxidation is studied in two steps corresponding to the process. We develop a concurrent etching/deposition model to explain the mechanism that leads to the scallop geometry of the Bosch process. The effects of etching and passivation in the Bosch process are modeled to provide a guideline to control the cross-section of the stacked nanowires. The relationship between the initial shape of the silicon ridge after the Bosch process and the final core shape after stress-limited oxidation is analyzed. Based on the analysis, an empirical model is developed to predict the final nanowire...[ Read more ]

As the shape of the nanowire can significantly influence the characteristics of the resulting nanowire transistors, the cross-section of stacked silicon nanowires formed by the Bosch process and stress-limited oxidation is studied in two steps corresponding to the process. We develop a concurrent etching/deposition model to explain the mechanism that leads to the scallop geometry of the Bosch process. The effects of etching and passivation in the Bosch process are modeled to provide a guideline to control the cross-section of the stacked nanowires. The relationship between the initial shape of the silicon ridge after the Bosch process and the final core shape after stress-limited oxidation is analyzed. Based on the analysis, an empirical model is developed to predict the final nanowire shape and oxide thickness under different initial shapes. Vertically stacked Gate-All-Around (GAA) MOSFETs have been fabricated with nanowire cross-section down to 10nm with channel length around 250nm based on the Bosch process plus stress-limited oxidation process, which show excellent performance with nearly ideal subthreshold slope of 62mV/dec, low leakage current and high Ion/Ioff ratio (~10⁸).