THESIS
2005
xvii, 146 leaves : ill. ; 30 cm
Abstract
A low temperature multiple photoresist mold metal electroplating technology was developed. This technology can be utilized to fabricate metallic MEMS devices directly on substrates containing IC fabricated electronic devices by a post-IC process. Normal IC process flow is not affected by the add-on MEMS process. A further integrated packaging solution is also proposed with the same low temperature plating technology to supply the first-level, wafer scale package. The packaging process combines with the MEMS devices process seamlessly to unite the MEMS integration and packaging as a whole. Integration and packaging are considered together at the beginning of MEMS design which allows this technology to realize real batch fabrication and fulfill the task of low-cost manufacturing to meet t...[
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A low temperature multiple photoresist mold metal electroplating technology was developed. This technology can be utilized to fabricate metallic MEMS devices directly on substrates containing IC fabricated electronic devices by a post-IC process. Normal IC process flow is not affected by the add-on MEMS process. A further integrated packaging solution is also proposed with the same low temperature plating technology to supply the first-level, wafer scale package. The packaging process combines with the MEMS devices process seamlessly to unite the MEMS integration and packaging as a whole. Integration and packaging are considered together at the beginning of MEMS design which allows this technology to realize real batch fabrication and fulfill the task of low-cost manufacturing to meet the low-end application requirement.
A packaged electrical inertia micro-switch was implemented. Separate and non-interfering photoresist-molded Au, Cu and PbSn solder metal-electroplating processes have been applied to the fabrication of the micro-switches and their wafer-level packaging in sealed cavities. The switches were designed using a simple but accurate lumped spring-mass model. The threshold velocity and natural frequency were calibrated by the drop hammer test and shaker test respectively. Testing results showed the good coincidence with the designed values. Packaging scheme supply the solution of independently control for the height of a switch and that of its cavity. It also provides leads for low-resistance electrical access to the sealed devices. The measured critical shear stress before packaging failure was around 30MPa for all samples. Using both the gross leak and fine leak hermeticity tests, all the samples reached the requirement.
An integrated floating gate electrostatic micro power generator was also implemented by the developed technology. The micro power generator was designed based on the technology of floating gate. The pre-charged floating gate by the TN tunneling technique acted as the voltage bias. Power is generated using a variable capacitor, formed between the resonator and the floating gate. A full analysis of the generator was done based on the system differential equations. A linear model for small signal input and a general model for nonlinearity analysis were built. Simulations were done using both models. The results from the two models corresponded well with each other. The properties of the electronic devices and the mechanical resonator were fully tested. The consistency of the electronic devices properties before and after the back-end process showed that the processing of the mechanical device has little effect on standard IC devices. Output power depending on the driving frequency and the resistant load was investigated using the shaker test. The maximum output power happened at the designed natural frequency. With an optimum load, the power generator worked at the pre-designed scale.
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