In recent years, polycrystalline silicon (polysilicon) thin film transistors (TFTs) have been actively investigated due to their relatively high field-effect mobility and high current driving ability. These characteristics allow them to find an increasing number of applications in the area of large area microelectronics, particularly for active-matrix liquid-crystal displays (AMLCDs) and active-matrix organic-light-emitting diodes (AMOLEDs). Low temperature polysilicon TFT appears to be one of the most promising technologies for display system-on-panel applications. For these applications, scaled-down poly-Si TFTs with high performance and high reliability are required. In order to build the integrated system on panels, a variety of devices such as high current digital devices, kink-fre...[ Read more ]

In recent years, polycrystalline silicon (polysilicon) thin film transistors (TFTs) have been actively investigated due to their relatively high field-effect mobility and high current driving ability. These characteristics allow them to find an increasing number of applications in the area of large area microelectronics, particularly for active-matrix liquid-crystal displays (AMLCDs) and active-matrix organic-light-emitting diodes (AMOLEDs). Low temperature polysilicon TFT appears to be one of the most promising technologies for display system-on-panel applications. For these applications, scaled-down poly-Si TFTs with high performance and high reliability are required. In order to build the integrated system on panels, a variety of devices such as high current digital devices, kink-free analog devices, high-voltage driver devices, capacitors, memory devices, etc., are needed. All of them should be available in low temperature poly-Si technology. In this thesis, novel poly-Si TFT devices and technologies are designed and implemented to meet the above requirements.

First, a novel self-align ultra-thin elevated-channel CMOS poly-Si TFT (SA-UT- ECTFT) is presented. The structure makes use of a back-light exposure technique to implement a self-aligned channel structure, in which a thin channel region is used to achieve high on-current, and a thick source/drain region is used to reduce the lateral electric field, thereby suppressing the kink effect and minimizing the leakage current. Using this structure, TFT devices with good saturation characteristics, good breakdown characteristics, high on-current, and low leakage current, which are very attractive for use in both analog and digital application, were obtained. Moreover, it makes the process control and the scale-down of the devices to be easier. Second, a new CMOS self-aligned double-gate (SADG) poly-Si TFT is present. The self-alignment between the top- and bottom- gate is also realized by the back-light exposure technique. Poly-Si TFT devices with excellent current saturation characteristics, high current drive, and low off-current were obtained. The device is very promising for fully-integrated display system-on-panel applications. Third, a novel self-aligned lightly-doped-drain poly-Si TFT using a partial exposure technique is presented. The partial exposure technique for obtaining LDD is simple and effective, and does not require any additional mask. The LDD region is self-aligned to the channel and with a length ranging from 0.4 μm to as much as a few μm. This technology will be very suitable for use in display system-on-panel applications. Finally, to achieve high performance and high reliability, a novel poly-Si TFT called the self-aligned offset-gated high-k spacer poly-Si TFT is presented. This device uses high-k dielectric (hafnium oxide) as spacers to solve the problem of high leakage current, but without introducing extra series S/D resistance. High-k spacer poly-Si TFT devices with higher drain breakdown voltage were also obtained. The devices are very attractive for display system-on-panel applications in which short channel TFT devices are required.