In recent years, low-voltage power MOSFETs are actively developed due to the expansion of their applications in various areas such as automotive electronics, computer peripherals, potable electronics, wireless communications, etc. Small conduction and switching loss, high switching speed, high reliability and simple fabrication process are demanded in low-voltage power MOSFETs. In order to meet these requirements, low-voltage power MOSFETs with small specific on-resistance, small parasitic capacitance and high ruggedness at inductive operations have to be developed. In this thesis, several novel low-voltage power MOSFETs are proposed and implemented to improve these device characteristics....[ Read more ]

In recent years, low-voltage power MOSFETs are actively developed due to the expansion of their applications in various areas such as automotive electronics, computer peripherals, potable electronics, wireless communications, etc. Small conduction and switching loss, high switching speed, high reliability and simple fabrication process are demanded in low-voltage power MOSFETs. In order to meet these requirements, low-voltage power MOSFETs with small specific on-resistance, small parasitic capacitance and high ruggedness at inductive operations have to be developed. In this thesis, several novel low-voltage power MOSFETs are proposed and implemented to improve these device characteristics.

First, a novel sub-20V planar power MOSFET using implantation to form the body and JFET regions is proposed and experimentally demonstrated. The novel device showed a 32 % reduction in the specific on-resistance, a 28% improvement in the figure-of-merit and a 3× reduction in the threshold voltage variation compared to that of the conventional planar DMOSFET. The device is promising for sub-20V dc/dc conversion applications. Second, a 30 V planar power MOSFET with a segmented JFET region is proposed and experimentally demonstrated. The novel device showed a 51 % reduction in the gate-drain charge density and a 48 % improvement in the figure-of-merit compared to that of the conventional planar DMOSFET. The device is very suitable to be used in 30 V power switching applications.

Finally, two 40 V trench power MOSFETs with thin source regions, including the vertical source region and the inverted L-shaped source region, are proposed and experimentally demonstrated. The novel vertical source device showed a 69 % enhancement in the avalanche energy absorption at unclamped inductive switching (UIS) and a 32 % reduction in the specific on-resistance compared to that of the conventional trench DMOSFET. The novel L-shaped source device showed a 2× enhancement in the avalanche energy absorption and a 30 % reduction in the specific on-resistance compared to that of the conventional trench DMOSFET. The novel devices are very promising for many automotive and switching power supply applications which involve inductive loads.