In recent years, image sensors have been widely used in various applications, such as biomedical micro-system applications, mobile imaging, internet video and video cameras. Since the image resolution and frame rate keep on increasing, extensive image processing capabilities, especially image compression, are becoming more and more significant for both still image and video devices. In addition, technology demand for high resolution, low power sensing devices is increasing particularly with the emergence of new generation of application. In late 1990s, Taking advantage of the development of CMOS technology, the pixel size of CMOS image sensor is now comparable to the pixel size of CCD image sensor. CMOS technology enables the integration of sensors and image precessing, making CM...[ Read more ]

In recent years, image sensors have been widely used in various applications, such as biomedical micro-system applications, mobile imaging, internet video and video cameras. Since the image resolution and frame rate keep on increasing, extensive image processing capabilities, especially image compression, are becoming more and more significant for both still image and video devices. In addition, technology demand for high resolution, low power sensing devices is increasing particularly with the emergence of new generation of application. In late 1990s, Taking advantage of the development of CMOS technology, the pixel size of CMOS image sensor is now comparable to the pixel size of CCD image sensor. CMOS technology enables the integration of sensors and image precessing, making CMOS image sensor the optimum solution to improve the performance of the overall system. Research focusing on on-chip image compression integrated with CMOS image sensor can be traced back to the 1990s. Various compression algorithms have been integrated with CMOS image sensor. However, in most of the reported applications, the high computational complexity of the integrated compression algorithm, and the high on-chip storage requirement for both the raw data and the compressed data present a great challenge that need to be overcome.

In this thesis, the concept of compressive acquisition sensor is proposed whereby the raw image is compressed during acquisition and prior to storage. The image sensor's design paradigm is therefore shifted from the traditional concept of capture → store → compress to a new design paradigm namely: capture → compress → store. The idea consists of compressing the data within each pixel before storage, making it possible to use fewer storage bits at the pixel level, and hence reducing the size of the memory required for digital pixel sensors (DPSs). The advantage of the proposed concept is three fold: (i) reduced on-chip storage requirement for on-chip image compression applications, (ii) improved performance of digital pixel sensor (DPS) (reduced silicon area and increased fill-factor) and (iii) compression processing integrated within the pixel array, enabling the concept of parallel processing. Different compression algorithms are proposed for the compressive acquisition CMOS image sensor. Mathematical models are derived in order to optimize the parameters of the proposed compression algorithm. Implementation of the proposed compressive acquisition processing is also proposed at the pixel-level/quadrant-level leading to improved DPS performance. Results illustrate that the proposed algorithms can result in more than 50% on-chip memory saving at an average PSNR level of around 25dB. The proposed compressive acquisition sensor not only reduces the storage memory requirement for on-chip image compression but also results in area saving (more than 60% reduced) and fill-factor improvements (about 40%) of DPS.