THESIS
2016
xiv leaves, 76 pages : illustrations ; 30 cm
Abstract
In this work, an interlayer dielectric with an extremely low dielectric constant of 1.96 is
achieved using SiO
2 with vertically aligned cylindrical pores. Vertically grown carbon
nanotubes are used as templates to form cylindrical pores to achieve high porosity while
maintaining structural stability. Measurements show that an elastic modulus of 17.5
GPa can be maintained, even at 65% porosity, to provide sufficient mechanical strength
for most back end of line (BEOL) processes. The tradeoff between the dielectric constant
and elastic modulus for different porous structures has also been studied to project the
ultimate achievable k-value.
A BEOL compatible thick dielectric and metal based interconnect, which eliminates the
resistive and substrate eddy current loss from on-ch...[
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In this work, an interlayer dielectric with an extremely low dielectric constant of 1.96 is
achieved using SiO
2 with vertically aligned cylindrical pores. Vertically grown carbon
nanotubes are used as templates to form cylindrical pores to achieve high porosity while
maintaining structural stability. Measurements show that an elastic modulus of 17.5
GPa can be maintained, even at 65% porosity, to provide sufficient mechanical strength
for most back end of line (BEOL) processes. The tradeoff between the dielectric constant
and elastic modulus for different porous structures has also been studied to project the
ultimate achievable k-value.
A BEOL compatible thick dielectric and metal based interconnect, which eliminates the
resistive and substrate eddy current loss from on-chip magnetics, is also proposed. Fully
integrated on-chip inductors with up to 200 nH/mm
2 inductance density and a peak
quality factor of 25, were implemented based on the proposed interconnect technology,
and a complete system for on-chip wireless power supply was implemented to demonstrate the integration capability. The 2.5 x 2.5 mm
2 wireless power receiver chip can
harvest 27 mW power from a 250 mW transmitting power source at a distance of 5.3
mm, which is the best power harvesting capability compared to other reported technologies.
The thick dielectric interconnect technology is also proved to be useful to minimize
the radiation loss of on-chip antennas. Several millimeter-wave antenna topologies are
demonstrated utilizing this technology. An on-chip triangular sleeve monopole, which has a wide bandwidth from 23 GHz to 63 GHz, with 3.5 dB gain and efficiency of 98%,
has been implemented. The antenna is integrated with a foundry fabricated wideband
power amplifier IC. This demonstrates the efficacy of the proposed interconnect technology, which has applications ranging from power management to high-speed wireless
data communication.
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