In ultrasound image analysis, speckle tracking methods are widely applied to study the elasticity of body tissue. However, “feature-motion decorrelation” remains a challenge for speckle tracking methods. Recently, a coupled filtering method and an affine warping method were proposed to accurately estimate strain values when the tissue deformation is large. The major drawback of the new methods is the high computational complexity. Even the GPU-based program requires 5 hours and 50 minutes for the two methods to finish the analysis on a simulated ultrasound image set, respectively.

In this thesis, the FPGA implementations of the new methods are presented. The algorithms are divided and reformulated as three computation modules: image warping, image filtering and sliding window...[ Read more ]

In ultrasound image analysis, speckle tracking methods are widely applied to study the elasticity of body tissue. However, “feature-motion decorrelation” remains a challenge for speckle tracking methods. Recently, a coupled filtering method and an affine warping method were proposed to accurately estimate strain values when the tissue deformation is large. The major drawback of the new methods is the high computational complexity. Even the GPU-based program requires 5 hours and 50 minutes for the two methods to finish the analysis on a simulated ultrasound image set, respectively.

In this thesis, the FPGA implementations of the new methods are presented. The algorithms are divided and reformulated as three computation modules: image warping, image filtering and sliding window based optimal parameter search. For image warping, a fast and memory-saving scheme combining data-loading prediction and vector processing is proposed. For image filtering, two common approaches, direct convolution and Discrete Fourier Transformation (DFT) based method, are implemented and compared using simulation and phantom data. For window search, parallelization along two loops are built and a new approach to eliminate the redundancy during the search on a dense window grid is presented. The strategies on building the main pipeline that organizes all modules in a single FPGA are discussed.

The performance of the proposed FPGA implementations is evaluated with double floating point calculation. The running time is less than 10% of the previous GPU implementation.