After decades of development, silicon based power devices are approaching their
material limits in performance. To further enhance the device performance and thus the power
conversion efficiency, power devices based on wide-bandgap semiconductors that possess a
higher critical breakdown field are desired. SiC- and GaN-based power devices have been
intensively studied in recent years, because of the promise of a significantly lower specific on-resistance
(R
on) and a much faster switching speed, compared with the traditional silicon-based
power devices for the same voltage rating. However, power devices based on these two material
systems still face their respective technical challenges.
In this work, we addressed several critical issuses regarding GaN- and SiC-based power
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After decades of development, silicon based power devices are approaching their
material limits in performance. To further enhance the device performance and thus the power
conversion efficiency, power devices based on wide-bandgap semiconductors that possess a
higher critical breakdown field are desired. SiC- and GaN-based power devices have been
intensively studied in recent years, because of the promise of a significantly lower specific on-resistance
(R
on) and a much faster switching speed, compared with the traditional silicon-based
power devices for the same voltage rating. However, power devices based on these two material
systems still face their respective technical challenges.
In this work, we addressed several critical issuses regarding GaN- and SiC-based power
switching transistors via proper channel engineering. The work is divided into three parts:
Firstly, an E-mode GaN double-channel MOS-HEMT (DC-MOS-HEMT) is proposed
and experimentally demonstrated. The MOS-HEMTs with partially recessed gate is unsuitable
for mass production since its V
th is extremely sensitive to the recess depth, although it boasts a
high mobility in the gated channel. On the contrary, V
th of the fully recessed gate structure is
much less sensitive to the recess depth, but it is suffers from high MOS-channel resistance at
gate region and parasitic resistance at the gate recess corners. The proposed GaN DC-MOS-HEMT
combines the advantages of the two structures by forming a second channel several
nanometers underneath the original one. With the gate recess terminated within the upper
channel layer, V
th of the DC-MOS-HEMT is insensitive to the recess depth, while the lower
heterojunction channel helps reduce the channel resistance. The DC-MOS-HEMT is first
studied with analytical modelling, and numerical simulation. Then, the electrical coupling
between two channels of the double-channel heterostructure is experimentally investigated in
order to determine the double-channel heterostructure. The fabricated device demonstrates high
performances with a positive V
th, low R
on, large breakdown voltage, high current, a steep
subthreshold swing, and robustness against process variation.
Secondly, channel engineering of SiC MOSFETs is discussed. The SiC planar
MOSFET and SiC trench MOSFET have their respective problems. In the first half of this
chapter, we proposed an alternate MSOFET archetecture for SiC: the trench/planar MOSFET
(TP-MOS). The TP-MOS combines the advantages of the planar MOSFET and the trench
MOSFET, achieving a reduced oxide field, a low R
on and an enhanced switching performance.
In the second half of this chapter, the influences of termination of p-shield in a SiC trench
MOSFET is studied. The trench MOSFET is an effective approach to lower the channel
resistance since its channel density is high. A p-shield is commonly suggested to protect the
gate oxide at the trench bottom. It was found in this thesis a floating p-shield induces a series
of dynamic performance degradations. These degradations were well explained by a charge
storage mechanism. Therefore, a grounded p-shield should be adopted for SiC trench MOSFET.
Thirdly, a GaN/SiC hybrid field effect transistor (HyFET) for power switching
applications is proposed. The GaN HEMT boasts a low channel resistance and a low reverse
transfer capacitance, but they are unsuitable for high voltage applications (e.g., >1000 V) due
to their lateral configuration and significant surface/buffer trapping under high drain voltage.
SiC MOSFETs are superior power devices for high voltage applications. The main issue for
SiC MOSFETs is the high channel resistance caused by the low channel mobility. Since
epitaxial growth of GaN layers on SiC substrate is a rather mature technology, a superior power
device is expected if the merits of both SiC devices and GaN HEMTs are combined on a single
platform. The GaN/SiC hybrid field-effect transistor (HyFET) utilizes a high mobility
enhancement-mode AlGaN/GaN channel to reduce the channel resistance, while a vertical 4H-SiC
drift region is used to sustain the high off-state voltage. Remarkable improvements on R
on,
C
GD, and gate charges are achieved in the HyFET compared with the conventional SiC
MOSFET for the same voltage rating.
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