THESIS
2018
xiii, 111 pages : illustrations ; 30 cm
Abstract
Energy-per-bit efficiency has quickly become the ultimate limiting factor in the design of a
switching fabric for routers and data center networks. People are now turning to optics for
solutions. Different optical devices have been invented in recent years and each has its own
advantages and limitations. How to find suitable optical switching architectures to exploit their
advantages and avoid their limitations has been a hot research area.
In this thesis, we study some architecture issues related to two optical switching
technologies: arrayed waveguide gratings (AWGs) and silicon photonic microrings. AWGs
have been used in optical data center networks, and microrings in optical networks on chips
(NoCs). But AWG-based optical switches have two limitations: scalability and crosst...[
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Energy-per-bit efficiency has quickly become the ultimate limiting factor in the design of a
switching fabric for routers and data center networks. People are now turning to optics for
solutions. Different optical devices have been invented in recent years and each has its own
advantages and limitations. How to find suitable optical switching architectures to exploit their
advantages and avoid their limitations has been a hot research area.
In this thesis, we study some architecture issues related to two optical switching
technologies: arrayed waveguide gratings (AWGs) and silicon photonic microrings. AWGs
have been used in optical data center networks, and microrings in optical networks on chips
(NoCs). But AWG-based optical switches have two limitations: scalability and crosstalk. We
tackle these two issues in this thesis. We explore constraint-based scheduling to reduce the
crosstalk in AWG-based switches that are based on single-stage and two-cascaded AWGs. We
also design a highly scalable AWG-based switch architecture that can meet the projected
capacity demand of future data center networks. For microring-based NoCs, we focus on power
minimization, which has become an ultimate bottleneck in embedded systems. We also study
how to use routing to reduce power consumption in microring-based NoCs.
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