Wide-bandgap Gallium Nitride based high-electron-mobility transistors (GaN HEMTs) are capable of delivering high power density at high frequencies with superior performance for RF/ microwave wave power switches and amplifiers used in an advanced wireless system (e.g., 5G communication), benefiting from the hetero-junction-based lateral structure that significantly boosts the carrier density and mobility in a 2-dimensional electron gas (2DEG) channel with low terminal capacitances. The epitaxy growth on a foreign substrate like silicon carbide or sapphire has been widely used for high-frequency applications with a relatively high cost. Compared with these currently adopted GaN-on-SiC/Sapphire platforms, GaN on Silicon substrate (GaN-on-Si), a mature solution for power electronics, is att...[
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Wide-bandgap Gallium Nitride based high-electron-mobility transistors (GaN HEMTs) are capable of delivering high power density at high frequencies with superior performance for RF/ microwave wave power switches and amplifiers used in an advanced wireless system (e.g., 5G communication), benefiting from the hetero-junction-based lateral structure that significantly boosts the carrier density and mobility in a 2-dimensional electron gas (2DEG) channel with low terminal capacitances. The epitaxy growth on a foreign substrate like silicon carbide or sapphire has been widely used for high-frequency applications with a relatively high cost. Compared with these currently adopted GaN-on-SiC/Sapphire platforms, GaN on Silicon substrate (GaN-on-Si), a mature solution for power electronics, is attractive for significant practical benefits, including reduced substrate cost large-size wafers that are compatible with the mainstream Silicon fabrication process. However, there is still have room for improving the device's high-frequency performance in the GaN-on-Si platform.
To improve the high-frequency performance of the GaN-on-Si towards GaN-on-SiC, this work engaged the channel and buffer engineering techniques to enhance the device's high-frequency performance of linearity and efficiency. This thesis is divided into three parts:
Firstly, from the channel engineering methodology in epitaxy design, a closely coupled double-channel epitaxial structure has been experimentally demonstrated for improving device linearity. Compared to the multi-channel schemes, this double-channel high-electron-mobility transistor (DC-HEMT) can be turned off completely solely by a top gate at moderate negative gate bias, yielding a planar device friendly to manufacturing. Furthermore, this is a closely coupled DC-HEMT realized by inserting an Aluminum Nitride insertion layer (AlN-ISL) 7-nm beneath the AlGaN/GaN hetero-junction interface. Without intentional doping in the AlN-ISL, the double-channel structure holds a total electron density close to that of the single-channel high-electron-mobility transistor (SC-HEMT). This structure is designed to be strongly coupled with balanced carrier distribution in both the access region and the gated region, with an efficient inter-channel electrical connection. With reduced carrier density in each channel, the optical phonon scattering effect is suppressed to yield a boosted saturation velocity, especially at the high voltage bias condition. Meanwhile, the transport property under the high electric field also has been improved, resulting from the alleviated influence of the optical phonon scattering. The measured source resistance of DC-HEMT shows a smaller dependence on drain current compared to the SC-HEMT. The small-signal measurement, including current gain cut-off frequency (f
T) and power gain cut-off frequency (f
MAX) exhibits a wider operating region and of the bias condition. The more uniform the gains are within the wide voltage ranges those large signals could cover, the less distortion would be generated in output signals. The larger value of output 3rd intercept point (OIP3) also proves the linearity enhancement in load-pull measurement.
Secondly, from the other engineering methodology in fabrication design, a novel convergent channel on double-channel epitaxy has been experimentally demonstrated for exploiting the design freedom of channel engineering along all the degrees of design freedom, along the gate width direction, gate length direction, and the direction perpendicular to the surface of GaN HEMTs, by implementing multiple parallel sub-channel sections with convergent funnel shape to reduce the intrinsic knee voltage of the gate region. It was fabricated by utilizing planar and low-energy fluorine ion implantation. The convergent channel enables GaN HEMTs to operate in saturation mode at smaller drain bias, making them suitable for high-frequency applications with medium to low supply voltages. In this funnel-shaped convergent channel HEMTs, with an identical voltage across the channel, a higher electric field would be generated at the drain-side of the convergent channel. Consequently, electrons at the drain-side of the convergent channel would be converged and forced to drift at a higher velocity compared to those in a conventional rectangular channel, resulting in earlier current saturation at smaller drain bias.
Thirdly, from the buffer engineering methodology, a thick GaN buffer on a low-resistivity Silicon substrate was utilized for enhancing the high-frequency performance by reducing the loss from the substrate. The growth of the thick GaN buffer (7.7 μm) is achieved through a vacancy engineering method to promote dislocation bending and maintain compressive lattice strain at the same time. More distance between the conducting channel and substrate decreased the high parasitic capacitances generated from the Silicon substrate. This thick GaN buffer technique with reduced substrate loss could increase the motivation of using low-resistivity silicon in substitution for high-resistivity silicon substrate to lower the cost of the RF devices. Moreover, the high voltage blocking capability exhibits another benefit of monolithic integration of RF signal amplification and power switching application.
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