With the rapid development of the Internet-of-things (IoT), a massive data are expected to be transmitted and higher data rate wireless communication systems are required. This situation has resulted in using of high-speed analog-to-digital converters (ADC) to digitize the wide band incoming signal at reasonable power consumption without effective resolution degradation. Time-interleaved ADCs have big advantages in sampling speed than monolithic ADCs. Nonetheless, there are still critical issues that need to be addressed before the time-interleaved ADCs can be applied in real commercial applications. The most well-known problem is that the mismatches among the sub-ADC channels can significantly degrade overall ADC performance. Thus, this thesis focuses on the research of practical cali...[ Read more ]

With the rapid development of the Internet-of-things (IoT), a massive data are expected to be transmitted and higher data rate wireless communication systems are required. This situation has resulted in using of high-speed analog-to-digital converters (ADC) to digitize the wide band incoming signal at reasonable power consumption without effective resolution degradation. Time-interleaved ADCs have big advantages in sampling speed than monolithic ADCs. Nonetheless, there are still critical issues that need to be addressed before the time-interleaved ADCs can be applied in real commercial applications. The most well-known problem is that the mismatches among the sub-ADC channels can significantly degrade overall ADC performance. Thus, this thesis focuses on the research of practical calibration techniques of time-interleaved ADCs for wideband communication system.

First, to solve the spurs aliasing issues of calibration in wideband communication system, we develop an all-digital foreground calibration technique with on-chip calibration generation. By exploiting the temporal and spectral information of spurs, a fast calibration algorithm is developed which can compensate all mismatch sources at real time. Also, fast calibration speed ensures the technique can be applied periodically in a time-interleaved ADC system, which make the foreground calibration can track the environment changes feasibly. Extensive simulations show that this technique can suppress the spurs in a 16-channel 12-bit ADC reliably to be lower than -80dBc from as high as -40dBc.

Second, to avoid the foreground calibration phase during normal operation of ADC, an all-digital background calibration technique with blind detection is introduced in this thesis. The method exploits the correlation of the signal and its spurs in the spectral domain to detect the mismatch information. Furthermore, there is no need of training signals or reference channel. The only assumption is that the input signal should be cyclostationary, which is the property of majority communication signals. Extensive simulations show that this technique can suppress the spurs in a 16-channel 2GS/s 12-bit ADC reliably to be lower than -80dBc from as high as -40dBe for 5G OFDM (orthogonal frequency-division multiplexing) signals with 1GHz bandwidth.

Finally, we evaluate the calibration techniques with experimental test. The testing scheme of calibration techniques includes a time-interleaved ADC board, a Field Programmable Gate Array (FPGA) board to implement the calibration algorithm, a vector signal generator to generate test signals and a PC to do the analysis of the collected data. The measurement results show that the developed calibration techniques of this thesis work can be well applied with practical wideband communication signals.