HKUST Electronic Theses Advanced clock multiplier and SAR ADC design techniques for high-resolution signal chain systems
by Qifeng Huang
THESIS
2024
Ph.D. Electronic and Computer Engineering
1 online resource (xiii, 114 pages) : illustrations (some color)
Access
Not presently available for public access at author's request
Abstract
*CONFIDENTIAL*
Permanent URL for this record: https://lbezone.hkust.edu.hk/bib/991013340444103412
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