Nowadays, as the demand for wireless communication continues to expand, the need for high quality (Q) on-chip planar spiral inductors for high-level integration of RF circuits. in order to reduce costs, has become more important. Recently, many research activities have been focused on the design, model and optimization of spiral inductors on silicon substrate. However, most of the reported Q of inductors are limited to below 10 at giga hertz range. Yet, recently an extremely high-Q monolithic inductor on silicon substrate with Q2000 was reported [9]. Such a high quality factor may greatly improve the performance of monolithic RF circuits. Unfortunately, detailed design considerations are absent. In this thesis, experimental and simulation results for the high-Q inductor on silicon subst...[ Read more ]

Nowadays, as the demand for wireless communication continues to expand, the need for high quality (Q) on-chip planar spiral inductors for high-level integration of RF circuits. in order to reduce costs, has become more important. Recently, many research activities have been focused on the design, model and optimization of spiral inductors on silicon substrate. However, most of the reported Q of inductors are limited to below 10 at giga hertz range. Yet, recently an extremely high-Q monolithic inductor on silicon substrate with Q>2000 was reported [9]. Such a high quality factor may greatly improve the performance of monolithic RF circuits. Unfortunately, detailed design considerations are absent. In this thesis, experimental and simulation results for the high-Q inductor on silicon substrate will be presented. Several test wafers with the high-Q inductors were fabricated in the Microelectronic Fabrication Facility (MFF) of HKUST for testing the performance of the inductors. A suitable lumped broadband-equivalent circuit model of the high-Q inductor which can be incorporated into circuit simulators will be shown to illustrate the improvements in quality factor. A design space with a range of gain and phase difference of the current in the coils of the inductor will be reported. A test chip was fabricated in 0.35-μm CMOS N-well process to study the application of the high-Q inductor in RF circuit design. A design example reveals the application of the high-Q inductor in a power amplifier design at 835-MHz. Another by-product that accompanies high-level of integration is a higher susceptability to cross-talk between circuits on the same chips, such interference is substrate noise coupling. In this thesis, we will also present some simulation results for the substrate noise induced from the planar spiral inductor on two different substrates for CMOS process technology.